Circuit and method for combining SPAD outputs
US11740334B2 · kind B2 · utility
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13Claims
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Key dates
| Filing date | Jun 11, 2020 |
| Grant date | Aug 29, 2023 |
| Priority date | — |
| Expiry date | Jun 8, 2041 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K5/1534
- WIPO fieldMeasurement
- WIPO sectorInstruments
Abstract
A combining network for an array of SPAD devices includes: synchronous sampling circuits, wherein each synchronous sampling circuit is coupled to an output of a corresponding SPAD device and is configured to generate a pulse or an edge each time an event is detected; and a summation circuit coupled to an output of each of the synchronous sampling circuits and configured to count a number of pulses or edges to generate a binary output value.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.