Interface of integrated circuit die and method for arranging interface thereof
US11742295B2 · kind B2 · utility
Assignees
Inventors
Key dates
| Filing date | Dec 28, 2020 |
| Grant date | Aug 29, 2023 |
| Priority date | — |
| Expiry date | Jun 19, 2041 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/15311
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
An interface of integrated circuit (IC) die includes a plurality of the contact elements formed as a contact element pattern corresponding to a parallel bus. The contact elements are arranged in an array of rows and columns and divided into a transmitting group and a receiving group. The contact elements of the transmitting group have a first contact element sequence and the contact elements of the receiving group have a second contact element sequence, the first contact element sequence is identical to the second contact element sequence. The contact elements with the first contact element sequence and the second contact element sequence are matched when the contact element pattern is geometrically rotated by 180° with respect to a row direction and a column direction.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.