Semiconductor circuit and electronic apparatus
US11744064B2 · kind B2 · utility
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1References
15Claims
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Assignee
Inventor
Key dates
| Filing date | Feb 18, 2020 |
| Grant date | Aug 29, 2023 |
| Priority date | — |
| Expiry date | Aug 16, 2040 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C11/161
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A semiconductor circuit according to the present disclosure includes: a first memory element including a first terminal, a second terminal coupled to a first node, and a tunnel barrier film, and configured to store information by breaking the tunnel barrier film; a first transistor including a drain coupled to the first node, a source, a gate, and a back gate coupled to a second node; and a second transistor including a drain, a source coupled to the second node, and a gate coupled to the first node.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.