Display panel and display device
US11747691B2 · kind B2 · utility
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17Claims
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Assignee
Inventors
Key dates
| Filing date | Jan 29, 2021 |
| Grant date | Sep 5, 2023 |
| Priority date | — |
| Expiry date | Nov 1, 2041 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG09G2310/0297
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
A display panel and a display device are disclosed. The display panel includes a transistor disposed in the non-display area. The transistor includes a charge inducing layer, and a first insulating layer, an active layer, a second insulating layer, and a gate electrode all disposed on the charge inducing layer, so that the actively layer, the gate electrode, and the charge inducing layer collectively form a capacitance system, which benefits extending of the conduction time of the transistor, thereby giving a boost to an increase in a charging rate of the data line, and ensuring a smooth display of the display panel.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.