Methods for engineering integrated circuit design and development
US11748541B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Oct 25, 2021 |
| Grant date | Sep 5, 2023 |
| Priority date | — |
| Expiry date | Feb 24, 2042 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2119/18
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Systems and methods for engineering integrated circuit design and development are described. A requester posts a request for an integrated circuit chip design using the systems and methods. Moreover, using design tools of the systems and methods, one or more designers generate one or more designs. The designers use computer software that is provided by the systems and methods to test the one or more designs. Moreover, the designs are independently verified by a design engineering entity or by other designers. The one or more designs are provided to a fab via the systems and methods to fabricate a prototype of an integrated circuit chip. The prototype is tested on a printed circuit board by using a test software, which is provided by the systems and methods.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.