Patent · US Active

Method for contacting and packetising a semiconductor chip

US11749638B2 · kind B2 · utility

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0References

5Claims

0Family size

Assignee

Technische Universität Chemnitz · DE

Inventors

Johannes Rudolph · Bad Lausick, DE
Fabian Lorenz · Magdeburg, DE
Ralf Werner · Hilden, DE
Peter Seidel

Key dates

Filing date	Jan 29, 2019
Grant date	Sep 5, 2023
Priority date	—
Expiry date	Sep 17, 2039

Classification

Technology area (CPC H)Electricity
CPC primaryH01L2924/13091
WIPO fieldSemiconductors
WIPO sectorElectrical engineering

Abstract

A method for contacting and packaging a semiconductor chip of a power electronic component. The power electronic component has a first contact face produced in a first step via a multi-material printing process and a semiconductor chip, which is placed in a second step onto the first contact face. A ceramic insulation layer, which surrounds the semiconductor chip along its circumference and extends over the first contact face not covered by the semiconductor chip, is printed in a third step onto the first contact face. A second contact face is printed in a fourth step onto the ceramic insulation layer and the semiconductor chip. In a fifth step, the power electronic component is sintered by means of heat treatment.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.