Method and apparatus for functional unit balancing at program compile time
US11755299B2 · kind B2 · utility
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27Claims
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Key dates
| Filing date | Jun 23, 2021 |
| Grant date | Sep 12, 2023 |
| Priority date | — |
| Expiry date | Nov 13, 2041 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F8/451
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
There is provided methods and apparatus to improve runtime by computer programs at compilation time. A compiler analyzes code to be translated into machine executable instructions to identify overloaded functional units of the target processor, and replaces instructions scheduled on the overloaded functional unit to an idle unit using functionally equivalent operations on the idle unit. The replacement instructions may be taken from an instruction replacement library comprising function calls that implement functionality of a functional unit of the target processor on another functional unit of the target processor.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.