System and method of limiting access of processors to hardware resources
US11755785B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Aug 3, 2020 |
| Grant date | Sep 12, 2023 |
| Priority date | — |
| Expiry date | Jan 13, 2042 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F21/44
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A processing system including processors, peripheral slots, hardware resources, and gateway circuitry. Each processor is assigned a corresponding identifier. The peripheral slots are located within an addressable peripheral space. Each hardware resource is placed into a corresponding peripheral slot, including at least one direct memory access (DMA) device supporting at least one DMA channel and at least one general-purpose input/output (GPIO) pin. Memory protection and gateway circuitry is programmed to control access of the hardware resources only by a processor that provides a matching identifier. The memories along with hardware resources are protected against unauthorized accesses to isolate applications executed on each processor within a multicore system and hence support freedom of interference.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.