Dynamic voltage tuning to mitigate visual artifacts on an electronic display
US11756481B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Sep 8, 2021 |
| Grant date | Sep 12, 2023 |
| Priority date | — |
| Expiry date | Sep 8, 2041 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG09G2360/12
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
Systems, methods, and devices are provided for mitigating visual artifacts by dynamically tuning bias voltages applied to display pixels. An electronic display may include a display pixel and a bias voltage supply. The bias voltage supply may supply a first bias voltage to the display pixel for a first subframe of a frame of image data. The bias voltage supply may supply a different second bias voltage to the display pixel for a second subframe of the frame of image data. This may mitigate certain image artifacts, such as flicker or variable refresh rate luminance difference, that could arise due to display pixel hysteresis that varies across subframes of the image frame.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.