Control circuit, memory system and control method
US11756645B2 · kind B2 · utility
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2References
20Claims
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Assignee
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Key dates
| Filing date | Aug 23, 2021 |
| Grant date | Sep 12, 2023 |
| Priority date | — |
| Expiry date | Aug 23, 2041 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C2211/5641
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A control circuit, a memory system and a control method are provided. The control circuit is configured to control a plurality of memory cells of a memory array. The control circuit comprises a program controller. The program is configured to program a first electrical characteristic distribution and a second electrical characteristic distribution of the memory cells according to error tolerance of a first bit of a data type. A first overlapping area between the first electrical characteristic distribution and the second electrical characteristic distribution is smaller than a first predetermined value.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.