Method for etching insulating layer, method for manufacturing display device using the same, and display device
US11756964B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 25, 2021 |
| Grant date | Sep 12, 2023 |
| Priority date | — |
| Expiry date | Dec 10, 2041 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D86/471
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A method for etching an insulating layer includes: sequentially forming a first gate insulating layer, an amorphous silicon layer, a first interlayer insulating layer, and a second interlayer insulating layer on a substrate; applying a photoresist on the second interlayer insulating layer, and patterning the photoresist through a photo-process; first etching the second interlayer insulating layer and the first interlayer insulating layer until at least a portion of the amorphous silicon layer is exposed by using the patterned photoresist as a mask; second etching the second interlayer insulating layer and the first interlayer insulating layer; third etching the amorphous silicon layer; and fourth etching the first gate insulating layer, wherein an etching gas used in the second etching includes a material having a higher etching selection ratio of the first and second interlayer insulating layers to the amorphous silicon layer than an etching gas used in the first etching.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.