Monotonic and glitch-free phase interpolator and communication device including the same
US11757437B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Sep 1, 2021 |
| Grant date | Sep 12, 2023 |
| Priority date | — |
| Expiry date | Sep 1, 2041 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K2005/00058
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A phase interpolator includes a decoder, a digital-to-analog converter (DAC), and a phase mixer. The decoder generates first and second thermometer codes and a selection signal based on a code. The DAC includes unit cells, determines two of weight signals as first and second target weight signals based on the selection signal, and adjusts a current of the first and second target weight signals by controlling the unit cells based on the first and second thermometer codes and the selection signal. The phase mixer determines two of input clock signals as first and second target clock signals and generates an output clock signal based on the first and second target weight signals and the first and second target clock signals. A phase of the output clock signal is between phases of the first and second target clock signals. The unit cells include different first and second unit cells.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.