Backplane footprint for high speed, high density electrical connectors
US11758656B2 · kind B2 · utility
4Cited by
77References
6Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Jun 15, 2021 |
| Grant date | Sep 12, 2023 |
| Priority date | — |
| Expiry date | Aug 17, 2041 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY02P70/50
- WIPO fieldElectrical machinery, apparatus, energy
- WIPO sectorElectrical engineering
Abstract
A printed circuit board includes a plurality of layers including conductive layers separated by dielectric layers; and at least one via configured for solder attachment to a connector lead of a surface mount connector, the at least one via including a conductive element that extends from an upper surface of the printed circuit board through one or more of the plurality of layers, the conductive element having a recess in a surface thereof. The recess is configured to receive a tip portion of the connector lead of the surface mount connector. The printed circuit board may have via patterns including signal vias and ground vias.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.