Handling noise interference on an interlink
US11762506B2 · kind B2 · utility
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3References
18Claims
0Family size
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Key dates
| Filing date | Apr 12, 2022 |
| Grant date | Sep 19, 2023 |
| Priority date | — |
| Expiry date | Apr 12, 2042 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F3/04162
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Examples are disclosed that relate to handling noise interference on an interlink connecting hardware devices. One example provides a computing system comprising a first hardware device, a second hardware device, an interlink connecting the first hardware device and the second hardware device, a logic system, and a storage system. The storage system comprises instructions executable by the logic system to operate the interlink in an intermittently active mode, detect a noise interference scenario on the interlink, and in response, set a persistent active mode for the interlink.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.