Updates to flash memory based on determinations of bits to erase
US11762575B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jul 31, 2019 |
| Grant date | Sep 19, 2023 |
| Priority date | — |
| Expiry date | Jul 31, 2039 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C2013/0076
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
An example non-transitory machine-readable storage medium storing machine-readable instructions which when executed cause a processor to obtain stored bits stored on a flash memory, each of the stored bits in a set state or an unset state. The processor further obtains target bits, each of the target bits in the set state or the unset state, wherein each target bit corresponds to a stored bit to update the stored bit. The processor further determines whether, for one stored bit in the set state, the corresponding target bit is in the unset state. When the determination is positive, the processor sets the stored bits to the unset state and, after setting the stored bits to the unset state, updates the stored bits to match the corresponding target bits. When the determination is negative, the processor updates the stored bits to match the corresponding target bits.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.