Techniques to enable stateful decompression on hardware decompression acceleration engines
US11762698B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jun 18, 2021 |
| Grant date | Sep 19, 2023 |
| Priority date | — |
| Expiry date | May 5, 2042 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03M7/6058
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A hardware decompression acceleration engine including: an input buffer for receiving to-be-decompressed data from a software layer of a host computer; a decompression processing unit coupled to the input buffer for decompressing the to-be-decompressed data, the decompression processing unit further receiving first and second flags from the software layer of the host computer, wherein the first flag is indicative of a location of the to-be-decompressed data in a to-be-decompressed data block and the second flag is indicative of a presence of an intermediate state; and an output buffer for storing decompressed data from the decompression processing unit.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.