Nonvolatile memory device and method of detecting defective memory cell block of nonvolatile memory device
US11763901B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Aug 9, 2021 |
| Grant date | Sep 19, 2023 |
| Priority date | — |
| Expiry date | Oct 23, 2041 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C29/4401
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method of detecting, by a nonvolatile memory system, a defective memory cell block from among memory cell blocks, includes performing, after performing an erase operation, a read operation on at least some memory cells included in a target memory cell block based on an off-cell detection voltage that is different from a read reference voltage that distinguishes an off-cell on which no data is written from an on-cell on which data is written; counting a number of hard off-cells having a higher threshold voltage than the off-cell detection voltage from among the memory cells based on a result of performing the read operation; and identifying whether the target memory cell block is a defective memory cell block based on the number of counted hard off-cells.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.