Composite layer circuit element and manufacturing method thereof
US11764077B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Nov 11, 2021 |
| Grant date | Sep 19, 2023 |
| Priority date | — |
| Expiry date | Nov 11, 2041 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH05K2203/016
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
The embodiment of the disclosure provides a composite layer circuit element and a manufacturing method thereof. The manufacturing method of the composite layer circuit element includes the following. A carrier is provided. A first dielectric layer is formed on the carrier, and the first dielectric layer is patterned. The carrier on which the first dielectric layer is formed is disposed on a first curved-surface mold, and the first dielectric layer is cured. A second dielectric layer is formed on the first dielectric layer. The second dielectric layer is patterned. The carrier on which the first dielectric layer and the second dielectric layer are formed is disposed on a second curved-surface mold, and the second dielectric layer is cured. A thickness of a projection of the first curved-surface mold is smaller than a thickness of a projection of the second curved-surface mold.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.