Semiconductor device and manufacturing method thereof
US11764288B2 · kind B2 · utility
Assignees
Inventors
Key dates
| Filing date | Jun 30, 2022 |
| Grant date | Sep 19, 2023 |
| Priority date | — |
| Expiry date | Jun 30, 2042 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D62/307
Abstract
A method includes forming a body region of a first conductivity type and a doped region of a second conductivity type in a semiconductor substrate; forming a gate structure the substrate, and first gate spacers respectively on first and second sides of the gate structure; depositing a second spacer layer and a third spacer layer over the gate structure; patterning the third spacer layer into third gate spacers respectively on the first and second sides of the gate structure; removing a first one of the third gate spacers from the first side of the gate structure, while leaving a second one of the third gate spacers on the second side of the gate structure; and patterning the second spacer layer into a second gate spacer by using the second one of the third gate spacers as an etching mask.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.