Method of manufacturing semiconductor device
US11765880B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Apr 30, 2021 |
| Grant date | Sep 19, 2023 |
| Priority date | — |
| Expiry date | Jul 13, 2041 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10B12/50
Abstract
A method of manufacturing a semiconductor device includes: forming a lower structure that includes a substrate and conductive lines on the substrate, within a chip region and an edge region of the lower structure; forming data storage structures on the chip region of the lower structure; forming dummy structures on the edge region of the lower structure; forming an interlayer insulating layer covering the data storage structures and the dummy structures on the lower structure, the interlayer insulating layer including high step portions and low step portions, an upper end of the low step portions being lower than an upper end of the high step portions; and planarizing the interlayer insulating layer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.