Low-noise, high-resolution ratiometric capacitive baseliner
US11768564B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 16, 2021 |
| Grant date | Sep 26, 2023 |
| Priority date | — |
| Expiry date | Oct 5, 2041 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03K2217/96074
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
An apparatus includes a global baseliner circuit coupled with sensing channels of a sensing device. The global baseliner circuit has a signal generator to generate a rectified sinusoidal signal and a square wave having a frequency matching that of an excitation sinusoidal signal, and is to use the square wave to modulate the excitation sinusoidal signal provided at an output of the global baseliner circuit. A channel baseliner circuit is coupled between the global baseliner circuit and a sensing channel and that includes a switched capacitor coupled between the output of the global baseliner circuit and the sensing channel; a sigma-delta modulator coupled with the signal generator and to generate, from the rectified sinusoidal signal, a density-modulated bit stream; and a pair of AND gates to use the density-modulated bit stream and non-overlapping clock signals to generate outputs including density-modulated clock signals sent to switches of the switched capacitor.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.