Patent · US Active

Credit based memory scheduler

US11768630B1 · kind B1 · utility

1Cited by
2References
20Claims
0Family size

Assignee

Inventors

Key dates

Filing dateOct 27, 2021
Grant dateSep 26, 2023
Priority date
Expiry dateMar 26, 2042

Classification

  • Technology area (CPC G)Physics
  • CPC primaryG06F13/1668
  • WIPO fieldComputer technology
  • WIPO sectorElectrical engineering

Abstract

A memory controller can receive transactions from an interconnect to access the memory. The memory controller can use a credit-based scheme to request the interconnect to send specific memory transactions that can be scheduled in a desirable order using a credit type associated with each transaction. In some embodiments, the memory controller can keep track of the number of transactions directed to each bank of the memory based on a credit type, so that specific transactions directed towards the underutilized banks can be requested and scheduled in a manner to utilize all the banks more uniformly to improve the system performance.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.