Checkpointing
US11768735B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Feb 14, 2022 |
| Grant date | Sep 26, 2023 |
| Priority date | — |
| Expiry date | Feb 14, 2042 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F11/1008
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A system comprising: a first subsystem comprising at least one first processor, and a second subsystem comprising one or more second processors. A first program is arranged to run on the at least one first processor, the first program being configured to send data from the first subsystem to the second subsystem. A second program is arranged to run on the one more second processors, the second program being configured to operate on the data content from the first subsystem. The first program is configured to set a checkpoint at one or more points in time. At each checkpoint it records in memory of the first subsystem i) a program state of the second program, comprising a state of one or more registers on each of the second processors at the time of the checkpoint, and ii) a copy of the data content sent to the second subsystem since the respective checkpoint.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.