Timing controller, display device, and signal adjustment method
US11769467B2 · kind B2 · utility
Assignees
Inventors
Key dates
| Filing date | Jan 11, 2021 |
| Grant date | Sep 26, 2023 |
| Priority date | — |
| Expiry date | Jul 22, 2041 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG09G2310/08
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
A timing controller includes a receiving circuit, a timing control circuit, and a plurality of insertion loss circuits. The receiving circuit is configured to receive N frames of signals. The timing control circuit is configured to: detect a bit error rate of an (M-1)th-frame signal in a blanking interval of an Mth-frame signal; adjust a swing of the (M-1)th-frame signal according to a target swing value corresponding to the bit error rate of the (M-1)th-frame signal; and select the corresponding insertion loss circuit according to the target swing value corresponding to the bit error rate of the (M-1)th-frame signal, wherein M and N are both positive integers, and M is greater than 1 and less than or equal to N. The present disclosure is applied to signal adjustment of the timing controller.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.