Nonvolatile memory device, system including the same and method for fabricating the same
US11769546B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Sep 2, 2021 |
| Grant date | Sep 26, 2023 |
| Priority date | — |
| Expiry date | Nov 12, 2041 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2224/73251
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A nonvolatile memory device includes a first lower interlayer insulation layer and a second lower interlayer insulation layer that are sequentially stacked in a first direction; a lower metal layer disposed in the first lower interlayer insulation layer; and a plurality of lower bonding metals disposed in the first lower interlayer insulation layer and the second lower interlayer insulation layer and spaced apart from each other in a second direction that intersects the first direction. An uppermost surface in the first direction of the lower metal layer is lower than an uppermost surface in the first direction of the plurality of lower bonding metals, and the lower metal layer is placed between the plurality of lower bonding metals.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.