Stable memory cell identification for hardware security
US11769548B2 · kind B2 · utility
0Cited by
21References
13Claims
0Family size
Assignee
Inventors
Key dates
| Filing date | Mar 10, 2022 |
| Grant date | Sep 26, 2023 |
| Priority date | — |
| Expiry date | Mar 10, 2042 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04L9/3278
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A method includes setting an output of each memory cell in an array of memory cells to a same first value, decreasing power to the array of memory cells and then increasing power to the array of memory cells. Memory cells in the array of memory cells with outputs that switched to a second value different from the first value are then identified in response to decreasing and then increasing the power. A set of memory cells is then selected from the identified memory cells to use in hardware security.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.