Systems and methods for selectively addressing sparsely arranged electronic measurement devices
US11773437B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 17, 2018 |
| Grant date | Oct 3, 2023 |
| Priority date | — |
| Expiry date | May 7, 2041 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH10D62/121
- WIPO fieldMeasurement
- WIPO sectorInstruments
Abstract
A circuit comprising a substrate with sectors on the substrate is provided, each sector comprising clock and data lines, a controller in electrical communication with the clock and data lines, a counter bias line, an amplifier input line and nano-electronic measurement devices on the substrate. A source of each device is coupled to the counter bias line and a drain of each device is coupled to the amplifier input line to obtain an electrical signal on the drain, the identity of which is determined by electrical interaction between the device and a charge label. Each device drain is gated by a corresponding switch between an on state, in which the drain is connected to the amplifier input line, and an off state, in which the drain is isolated from the amplifier input line. The controller controls switch states responsive to clock signal line pulses and data input line data.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.