Apparatus and method for providing one time programmable memory features in a hypervisor of a computing device
US11775201B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Aug 8, 2018 |
| Grant date | Oct 3, 2023 |
| Priority date | — |
| Expiry date | Apr 12, 2039 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2221/033
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
An apparatus that includes a processor and a memory. The processor and the memory are configured to provide a first software process configured to execute at a first privilege level; and a second software process configured to execute at a second privilege level, wherein the first privilege level is more restrictive than the second privilege level. The processor is configured to, initialize, at the first privilege level, a memory pool within the memory, allocate, at the first privilege level, a block of memory, send a request to write protect the block of memory to the second software process, and to write protect, at the second privilege level, the allocated block of memory.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.