Bias circuit for radio frequency power amplifier
US11777454B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | May 8, 2023 |
| Grant date | Oct 3, 2023 |
| Priority date | — |
| Expiry date | May 8, 2043 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03F2200/61
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
Disclosed is a bias circuit for a radio frequency power amplifier, including a resistor voltage divider network, a power amplifier coupled with the resistor voltage divider network and a bias voltage adjusting loop coupled to the resistor voltage divider network and including one voltage divider resistor and one transistor pair; one terminal of the voltage divider resistor is connected with a reference voltage, and an other terminal is coupled with a gate of the first metal oxide semiconductor transistor; the transistor pair includes a first metal oxide semiconductor transistor and a second metal oxide semiconductor transistor, where a gate of the second metal oxide semiconductor transistor is coupled to the gate of the first metal oxide semiconductor transistor.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.