Analog-to-digital converter capable of cancelling sampling noise
US11777512B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jul 29, 2021 |
| Grant date | Oct 3, 2023 |
| Priority date | — |
| Expiry date | Feb 4, 2042 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03M1/466
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
The present application discloses an analog-to-digital converter capable of cancelling sampling noise, which comprises: a sampling circuit configured to acquire an analog input signal; a sampling noise cancelling circuit has an input end connected with an output end of the sampling circuit, and is configured to cancel noise generated by the sampling circuit; a comparator has an input end connected with an output end of the sampling noise cancelling circuit, and an output end connected with an input end of a logic circuit, and is configured to compare magnitudes of output signals of the sampling noise cancelling circuit and output a comparison result to the logic circuit; and the logic circuit has an output end connected with the sampling circuit, and is configured to output a digital output signal, and process the comparison result to obtain a control signal by which an output voltage of the sampling circuit is controlled.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.