Print component with memory circuit
US11780222B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Oct 6, 2022 |
| Grant date | Oct 10, 2023 |
| Priority date | — |
| Expiry date | Oct 6, 2042 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C2207/105
- WIPO fieldTextile and paper machines
- WIPO sectorMechanical engineering
Abstract
A memory circuit for a print component including a plurality of I/O pads, including an analog pad, to connect to a plurality of signal paths which communicate operating signals to the print component. The memory circuit includes a controllable selector connected in line with one of the signal paths via the I/O pads, the selector controllable to disconnect the corresponding signal path to the print component, and a memory component to store memory values associated with the print component. A control circuit, in response to a sequence of operating signals received by the I/O pads representing a memory read, to operate the controllable selector to disconnect the signal path to the print component to block the memory read of the print component, and provide an analog signal to the analog pad to provide an analog electrical value at the analog pad representing stored memory values selected by the memory read.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.