Multiprocessor system cache management with non-authority designation
US11782836B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 30, 2022 |
| Grant date | Oct 10, 2023 |
| Priority date | — |
| Expiry date | Jun 28, 2042 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F2212/603
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A primary controller has authority of a cache line associated with a fetch and manages a second cache line request from a different and non-associated secondary requesting entity. A secondary controller, associated with the secondary requesting entity, is granted authority of the cache line and further manages multiple subsequent simultaneous or overlapping requests for the cache line from different non-associated subsequent requesting entities by maintaining authority of the cache line, by granting read-only access to the cache line to respective subsequent controllers, each associated with a different subsequent requesting entity, and by passing a non-authority token to each of the respective subsequent controllers.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.