Flexible data handling
US11782865B1 · kind B1 · utility
Assignee
Inventors
Key dates
| Filing date | Jun 2, 2021 |
| Grant date | Oct 10, 2023 |
| Priority date | — |
| Expiry date | Jun 2, 2041 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06F13/161
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
An integrated circuit can be used to regulate data flow in a computing system. The integrated circuit can receive input data via a first interface associated with a first type of bus protocol and provide output data via a second interface associated with a second type of bus protocol. Size of the input data and the output data may vary based on the corresponding protocols. The integrated circuit can receive, via the first interface, an input data size for a write transaction to store the input data in a data storage unit. The integrated circuit can also receive a requested data size, via the second interface, to provide the output data for a read transaction. The integrated circuit can also generate an actual size of the output data based on the requested data size, the input data size, and size of the stored input data.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.