Integrated circuit structure
US11783107B2 · kind B2 · utility
0Cited by
4References
20Claims
0Family size
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Key dates
| Filing date | Feb 18, 2021 |
| Grant date | Oct 10, 2023 |
| Priority date | — |
| Expiry date | Sep 27, 2041 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L23/5252
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
An IC device includes a first anti-fuse structure including a first dielectric layer between a first gate conductor and a first active area, and a second anti-fuse structure including a second dielectric layer between a second gate conductor and the first active area. A first via is electrically connected to the first gate conductor at a first location a first distance from the first active area, a second via is electrically connected to the second gate conductor at a second location a second distance from the first active area, and the first distance is approximately equal to the second distance.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.