Gate driver and related output voltage control method
US11783795B1 · kind B1 · utility
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20Claims
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Key dates
| Filing date | Aug 23, 2022 |
| Grant date | Oct 10, 2023 |
| Priority date | — |
| Expiry date | Aug 23, 2042 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG09G2330/06
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
A gate driver for a panel, wherein the gate driver comprises at least an output channel unit, each of the output channel unit includes a first driving unit; a second driving unit; a first current limit circuit, coupled to the first driving unit, configured to control an output current according to an output voltage of the gate driver to limit an output current slew rate of the gate driver; and a second current limit circuit, coupled to the second driving unit, configured to control the output current according to the output voltage of the gate driver to limit the output current slew rate of the gate driver.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.