Structure and formation method of chip package with fan-out feature
US11784091B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Jun 5, 2020 |
| Grant date | Oct 10, 2023 |
| Priority date | — |
| Expiry date | Jun 5, 2040 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/3512
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
A package structure and a formation method of a package structure are provided. The method includes forming a conductive structure over a carrier substrate and disposing a semiconductor die over the carrier substrate. The method also includes forming a protective layer to surround the conductive structure and the semiconductor die. The method further includes forming an insulating layer over the protective layer. The insulating layer has an opening exposing a portion of the conductive structure. In addition, the method includes forming a conductive layer over the insulating layer. The conductive layer fills the opening, and the conductive layer has a substantially planar top surface.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.