Patent · US Active

Integrated circuit device and method of manufacturing the same

US11784122B2 · kind B2 · utility

2Cited by
3References
20Claims
0Family size

Assignee

Inventors

Key dates

Filing dateMay 9, 2022
Grant dateOct 10, 2023
Priority date
Expiry dateMay 9, 2042

Classification

  • Technology area (CPC H)Electricity
  • CPC primaryH10B12/482
  • WIPO fieldSemiconductors
  • WIPO sectorElectrical engineering

Abstract

An integrated circuit device includes a conductive line including a metal layer and an insulation capping structure covering the conductive line. The first insulation capping structure includes a first insulation capping pattern that is adjacent to the metal layer in the insulation capping structure and has a first density, and a second insulation capping pattern spaced apart from the metal layer with the first insulation capping pattern therebetween and having a second density that is greater than the first density. In order to manufacture the integrated circuit device, the conductive line having a metal layer is formed on a substrate, a first insulation capping layer having the first density is formed directly on the metal layer, and a second insulation capping layer having the second density that is greater than the first density is formed on the first insulation capping layer.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.