Semiconductor device and manufacturing method therefor

US11784221B2 · kind B2 · utility

Assignee

• INNOSCIENCE (ZHUHAI) TECHNOLOGY CO., LTD. · CN

Inventors

• King-Yuen Wong · Issaquah, US
• Ronghui Hao · Zhuhai, CN
• Jinhan Zhang · Suzhou, CN

Key dates

• Filing date: Mar 3, 2022
• Grant date: Oct 10, 2023
• Expiry date: Mar 3, 2042

Classification

• Technology area (CPC H): Electricity
• CPC primary: H10D64/256

Abstract

The HEMT includes a channel layer, a barrier layer, a drain, and a gate conductor. The barrier layer is disposed on the channel layer. The drain is disposed on the barrier layer. The gate conductor is disposed on the barrier layer. The channel layer includes a doped semiconductor structure overlapping with a top surface of the channel layer and having a bottom-most border that is located over a bottom-most surface of the channel layer and is spaced apart from the bottom-most surface of the channel layer. The doped semiconductor structure is located between the drain and the gate conductor.