Method for improving data flow and access for a neural network processor
US11784946B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Aug 5, 2021 |
| Grant date | Oct 10, 2023 |
| Priority date | — |
| Expiry date | Aug 5, 2041 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG06N3/048
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
A processor, processor implementation method, and a storage medium are disclosed, which relates to the field of artificial intelligence and deep learning. The processor includes: a system controller a data packing and unpacking module, a storage array module, and an operation module configured to perform operation processing on the acquired first packet, generate the second packet according to the operation result data, and return the second packet to the data packing and unpacking module. The storage array module comprises N1 storage units. The data packing and unpacking module comprises N2 data packing and unpacking units, each of the data packing and unpacking units is connected to the routing and switching module through a data channel. The universal operation module comprises M operation units. The activation operation module comprises P operation unit, each of the operation units is connected to the routing and switching module through a data channel.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.