On-chip heterogeneous AI processor with distributed tasks queues allowing for parallel task execution
US11789895B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Mar 9, 2020 |
| Grant date | Oct 17, 2023 |
| Priority date | — |
| Expiry date | Nov 10, 2040 |
Classification
- Technology area (CPC Y)Emerging Cross-Sectional Technologies
- CPC primaryY02D10/00
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
Embodiments described herein provide an on-chip heterogeneous Artificial Intelligence (AI) processor comprising at least two different architectural types of computation units, wherein each of the computation units is associated with a respective task queue configured to store computation subtasks to be executed by the computation unit. The AI processor also comprises a controller configured to partition a received computation graph associated with a neural network into a plurality of computation subtasks according to a preset scheduling strategy and distribute the computation subtasks to the task queues of the computation units. The AI processor further comprises a storage unit configured to store data required by the computation units to execute their respective computation subtasks and an access interface configured to access an off-chip memory. Different application tasks are processed by managing and scheduling the different architectural types of computation units in an on-chip heterogeneous manner.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.