Register file with write pre-charge
US11790978B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Sep 23, 2019 |
| Grant date | Oct 17, 2023 |
| Priority date | — |
| Expiry date | Feb 13, 2042 |
Classification
- Technology area (CPC G)Physics
- CPC primaryG11C11/419
- WIPO fieldComputer technology
- WIPO sectorElectrical engineering
Abstract
An embodiment of a novel memory circuit is described that improves post aging performance of a shared VCC node with a write pre-charge on the supply line. A write pre-charge PMOS device is added to the shared VCC node in some embodiments. The write pre-charge circuit helps insure that the shared VCC node has a healthy voltage value at the beginning of a write phase and also enables the memory circuit to recover the shared VCC value after the write phase (e.g., immediately following), enabling a read operation after a write operation for a same register file entry or adjacent entries (e.g., entries connected to the same shared VCC node). Other embodiments are disclosed and claimed.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.