Multichip semiconductor package including a bridge die disposed in a cavity having non-planar interconnects
US11791274B2 · kind B2 · utility
0Cited by
13References
17Claims
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Key dates
| Filing date | Jun 16, 2020 |
| Grant date | Oct 17, 2023 |
| Priority date | — |
| Expiry date | Nov 7, 2040 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L2924/181
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
Disclosed herein are microelectronic structures including bridges, as well as related assemblies and methods. In some embodiments, a microelectronic structure may include a substrate and a bridge.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.