Patent · US Active

Semiconductor device

US11791285B2 · kind B2 · utility

0Cited by
4References
20Claims
0Family size

Assignee

Inventors

Key dates

Filing dateMay 13, 2021
Grant dateOct 17, 2023
Priority date
Expiry dateOct 21, 2041

Classification

  • Technology area (CPC H)Electricity
  • CPC primaryH01L2924/143
  • WIPO fieldSemiconductors
  • WIPO sectorElectrical engineering

Abstract

A device includes an outer seal ring, an integrated circuit, and an inner seal ring. The outer seal ring forms a first closed loop. The integrated circuit is surrounded by the outer seal ring. The inner seal ring is between the outer seal ring and the integrated circuit. The inner seal ring forms a second closed loop that defines an enclosed region external to the integrated circuit.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.