Method and apparatus for reducing light leakage at memory nodes in CMOS image sensors
US11791354B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | May 8, 2020 |
| Grant date | Oct 17, 2023 |
| Priority date | — |
| Expiry date | Nov 17, 2040 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH04N25/709
- WIPO fieldAudio-visual technology
- WIPO sectorElectrical engineering
Abstract
Disclosed is a CMOS image sensor with global shutters and a method for fabricating the CMOS image sensor. In one embodiment, a semiconductor device, includes: a light-sensing region; a charge-storage region; a light-shielding structure; and at least one via contact; wherein the charge-storage region is spatially configured adjacent to the light-sensing region in a lateral direction, wherein the light-shielding structure is configured over the charge-storage region in a vertical direction so as to prevent incident light leaking from the light-sensing region to the signal-processing region, wherein the light-shielding structure is configured in an interlayer dielectric (ILD) layer, and wherein the light-shielding structure is simultaneously formed with the at least one via contact.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.