Analog circuit differential pair element mismatch detection using spectral separation
US11791779B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Dec 11, 2020 |
| Grant date | Oct 17, 2023 |
| Priority date | — |
| Expiry date | Apr 12, 2042 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03F2203/45614
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
A method for use in an analog circuit having a plurality of differential pairs of elements, wherein for each pair of the plurality of differential pairs of elements, the elements of the pair are designed to match but may have mismatch that induces error. The method includes, for each pair of at least two pairs of the plurality of differential pairs of elements: spectrally separating the mismatch-induced error of the pair from mismatch-induced error of a remainder of the plurality of differential pairs of elements, monitoring, by an analog-to-digital converter (ADC), an output of the analog circuit, and analyzing the monitored output to measure the mismatch-induced error of the pair.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.