Patent · US Active

Array substrate comprising a first metal layer electrically connected to a first doped area through a bridge layer and display panel

US11796847B2 · kind B2 · utility

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20Claims

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Assignee

WUHAN CHINA STAR OPTOELECTRONICS TECHNOLOGY CO., LTD. · CN

Inventors

Yong Xu · 红钢城街道, CN
Fei AI · 红钢城街道, CN

Key dates

Filing date	Aug 19, 2021
Grant date	Oct 24, 2023
Priority date	—
Expiry date	Aug 19, 2041

Classification

Technology area (CPC G)Physics
CPC primaryG02F2201/07
WIPO fieldOptics
WIPO sectorInstruments

Abstract

An array substrate, includes: a substrate, a first metal layer, a first buffer layer, and an active layer, a gate insulating layer, a second metal layer, a first insulating layer, a third metal layer and a first planarization layer. The first metal layer is electrically connected with the first doped area of the active layer through the bridge layer of the second metal layer. The third metal layer is electrically connected with the second doped area of the active layer. The array substrate of the present disclosure reduces a size of a thin film transistor by stacking the first metal layer, the second metal layer, and the third metal layer, thereby increasing pixel density. A display panel is also provided.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.