Output buffer and data driver circuit including the same
US11799431B2 · kind B2 · utility
Assignee
Inventor
Key dates
| Filing date | Dec 16, 2021 |
| Grant date | Oct 24, 2023 |
| Priority date | — |
| Expiry date | Dec 24, 2041 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH03F3/45219
- WIPO fieldBasic communication processes
- WIPO sectorElectrical engineering
Abstract
This disclosure relates to an output buffer including an input stage configured to monitor a difference between an input voltage and an output voltage, a current summing stage configured to generate amplified currents and control voltages according to the difference between the input voltage and the output voltage monitored by the input stage, an output stage configured to perform a pull-up operation or a pull-down operation according to the control voltages output from the current summing stage to generate the output voltage at an output terminal, and a slew boost circuit configured to perform a slew boost operation of adjusting some currents among currents provided from the current summing stage to the input stage according to the difference between the input voltage and the output voltage by monitoring the difference between the input voltage and the output voltage and selectively perform the slew boost operation by monitoring the control voltages.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.