Fractional sampling-rate converter to generate output samples at a higher rate from input samples

US11799487B2 · kind B2 · utility

Assignee

• Ningbo Aura Semiconductor Co., Ltd. · CN

Inventors

• Sandeep Sasi · Kanchinakote, IN
• Raja Prabhu J · Kanchinakote, IN
• Debasish Behera · Kanchinakote, IN
• Akash Gupta · Kanchinakote, IN
• Venkata Krishna Mohan Panchireddi · Kanchinakote, IN

Key dates

• Filing date: Dec 7, 2021
• Grant date: Oct 24, 2023
• Expiry date: Feb 14, 2042

Classification

• Technology area (CPC H): Electricity
• CPC primary: H03L2207/06
• WIPO field: Basic communication processes
• WIPO sector: Electrical engineering

Abstract

A fractional sampling-rate converter includes a first-in first-out (FIFO) buffer, a write logic, a read logic and a fractional interpolator. The write logic is designed to write input data samples into the FIFO at a first rate. The fractional interpolator is coupled to receive the input data samples from the FIFO and is designed to generate corresponding interpolated data samples as an output of the fractional sampling-rate converter at a second rate. The read logic is designed to cause input data samples in the FIFO buffer to be transferred to the fractional interpolator. A ratio of the second rate and the first rate is a fractional number greater than one.