Control method and device of overlay accuracy
US11803128B2 · kind B2 · utility
Assignee
Inventors
Key dates
| Filing date | Nov 9, 2021 |
| Grant date | Oct 31, 2023 |
| Priority date | — |
| Expiry date | Dec 9, 2041 |
Classification
- Technology area (CPC H)Electricity
- CPC primaryH01L22/12
- WIPO fieldSemiconductors
- WIPO sectorElectrical engineering
Abstract
In a control method for overlay accuracy, whether a similar layer of a present layer exists is determined first, where both the present layer and the similar layer are aligned relative to a same reference layer, and overlay accuracy requirements of both the present layer and the similar layer are relative to the reference layer; if so, an overlay error compensation value of a present batch of wafers at the present layer is determined according to an overlay error value of the present batch of wafers at the similar layer and/or an overlay error value of a previous batch of wafers at the similar layer; and a photoetching process is performed on the present layer of the present batch of wafers by means of the overlay error compensation value of the present batch of wafers at the present layer.
Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.