Patent · US Active

Voltage regulator circuit and corresponding memory device

US11803202B2 · kind B2 · utility

0Cited by
8References
20Claims
0Family size

Assignee

Inventors

Key dates

Filing dateSep 21, 2022
Grant dateOct 31, 2023
Priority date
Expiry dateOct 20, 2042

Classification

  • Technology area (CPC G)Physics
  • CPC primaryG11C16/30
  • WIPO fieldComputer technology
  • WIPO sectorElectrical engineering

Abstract

A voltage regulator receives an input voltage and produces a regulated output voltage. A first feedback network compares a feedback signal to a reference signal to assert/de-assert a first pulsed control signal when the reference signal is higher/lower than the feedback signal. A second feedback network compares the output voltage to a threshold signal to assert/de-assert a second control signal when the threshold signal is higher/lower than the output voltage. A charge pump is enabled if the second control signal is de-asserted and is clocked by the first pulsed control signal to produce a supply voltage higher than the input voltage. A first pass element is enabled when the second control signal is asserted and is selectively activated when the first pulsed control signal is asserted. A second pass element is selectively activated when the second control signal is de-asserted.

Source: USPTO / EPO open patent data. Objective bibliographic and citation counts.